Agfdhyk

I am using atmel's lwip example. Interfacing with PHY is ok. It can link and even auto negotiate. Netif is going up. But when i start polling netif nothing happens. Ive narrowed down problem to EMAC_Poll

unsigned char EMAC_Poll(unsigned char *pFrame, unsigned int frameSize, unsigned int *pRcvSize)

{

    unsigned short bufferLength;

    unsigned int   tmpFrameSize=0;

    unsigned char  *pTmpFrame=0;

    unsigned int   tmpIdx = rxTd.idx;

    volatile EmacRxTDescriptor *pRxTd = rxTd.td + rxTd.idx;



    ASSERT(pFrame, "F: EMAC_Pollnr");



    char isFrame = 0;

    // Set the default return value

    *pRcvSize = 0;



    // Process received RxTd

    while ((pRxTd->addr & EMAC_RX_OWNERSHIP_BIT) == EMAC_RX_OWNERSHIP_BIT) {

        // Never got there.

        ...

    }

    return EMAC_RX_NO_DATA;

}





typedef struct {

   volatile EmacRxTDescriptor td[RX_BUFFERS];

   EMAC_RxCallback rxCb; /// Callback function to be invoked once a frame has been received

   unsigned short idx;

} RxTd;



/// Describes the type and attribute of Receive Transfer descriptor.

typedef struct _EmacRxTDescriptor {

    unsigned int addr;

    unsigned int status;

} __attribute__((packed, aligned(8))) EmacRxTDescriptor, *PEmacRxTDescriptor;

There is while loop, but condition is never goes true.
I have very vague presentation what is RxTd and what exacly this condition means. However i can not see how thise RxTd Would change to pass condition. All references of RxTd leads to same emac.c module. Most of them in that polling function and rest in EMAC_ResetRx function.

static void EMAC_ResetRx(void)

{

    unsigned int Index;

    unsigned int Address;



    // Disable RX

    AT91C_BASE_EMAC->EMAC_NCR &= ~AT91C_EMAC_RE;

    // Setup the RX descriptors.

    rxTd.idx = 0;

    for(Index = 0; Index < RX_BUFFERS; Index++) {



        Address = (unsigned int)(&(pRxBuffer[Index * EMAC_RX_UNITSIZE]));

        // Remove EMAC_RX_OWNERSHIP_BIT and EMAC_RX_WRAP_BIT

        rxTd.td[Index].addr = Address & EMAC_ADDRESS_MASK;

        rxTd.td[Index].status = 0;

    }

    rxTd.td[RX_BUFFERS - 1].addr |= EMAC_RX_WRAP_BIT;

    // Receive Buffer Queue Pointer Register

    AT91C_BASE_EMAC->EMAC_RBQP = (unsigned int) (rxTd.td);

}

I do not realy understand last line, but it looks like that rxTd is auto filled with AT91 itself. If it is so, there may be packing/aligment problem, but Atmel added __attribute__ ((packed, aligned(8))) on RxTd structure definition. Any way, can someone describe mechanism of data input or tell me where proble might be?
By the way i am using gcc, if that matters.
UPD:
Ive checked RSR and notice that it is start with 0, then goes to 2 after second. 2- means new data was captured.
UPD:
So i've read about function of emac in datasheet for my chip. I was right. That RBQP register must point to array of descriptors. Each descriptor consists of address and status field. The datasheet states that "bit zero of address field is written to one to show the buffer has been used". Then ARM uses another rx descriptor from that array. I guess by "has been used" they mean that that buffer is filled with frame data and ready to be processed. This must mean that data just not going to that buffer. But it must be there because REC goes high. Additionaly i've checked that RE in NCR is up and MI is enabled. I have no idea what is wrong.

I've spend whole week to solve it. The funny thing is that if i've dump memory and looked at all those addresses - The data was there whole time! So the key was to disable I and D caching and MMU itself. Hope it will help someone.