Overflow/carry flag in MIPS











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I have searched a bit and didn't find anything that properly explained this.



In MIPS you have add and addu to do additions. The main difference is that addu doesn't generate an overflow exceptions.



Let's say we have this binary (I'm using four bits although MIPS is 32 for simplification):



0111


If we add 1 it becomes 1000.



With the add instruction there is an overflow and no carry, since a positive 7 became a negative 1 (assuming two's complement in MIPS). This generates an overflow exception too.



With the addu there is no overflow and no carry, since everything went as expected.



Now let's say you have this binary:



1111


If we add 1 it becomes 0000.



With the add instruction there should be no overflow since a negative 1 became a 0. What about the carry out flag, does it change to 1?



And what happens with the addu instruction? Is it considered overflow, since 15 became 0? I know that there is no overflow exception, but what happens to the overflow flag? Does it get set to 1? What about the carry flag?










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  • 1




    Which carry flag are you referring to? There's no status register in the MIPS architecture.
    – Michael
    Nov 12 at 11:18










  • @Michael oh I thought there was. My bad.
    – Myntekt
    Nov 13 at 12:18















up vote
0
down vote

favorite












I have searched a bit and didn't find anything that properly explained this.



In MIPS you have add and addu to do additions. The main difference is that addu doesn't generate an overflow exceptions.



Let's say we have this binary (I'm using four bits although MIPS is 32 for simplification):



0111


If we add 1 it becomes 1000.



With the add instruction there is an overflow and no carry, since a positive 7 became a negative 1 (assuming two's complement in MIPS). This generates an overflow exception too.



With the addu there is no overflow and no carry, since everything went as expected.



Now let's say you have this binary:



1111


If we add 1 it becomes 0000.



With the add instruction there should be no overflow since a negative 1 became a 0. What about the carry out flag, does it change to 1?



And what happens with the addu instruction? Is it considered overflow, since 15 became 0? I know that there is no overflow exception, but what happens to the overflow flag? Does it get set to 1? What about the carry flag?










share|improve this question


















  • 1




    Which carry flag are you referring to? There's no status register in the MIPS architecture.
    – Michael
    Nov 12 at 11:18










  • @Michael oh I thought there was. My bad.
    – Myntekt
    Nov 13 at 12:18













up vote
0
down vote

favorite









up vote
0
down vote

favorite











I have searched a bit and didn't find anything that properly explained this.



In MIPS you have add and addu to do additions. The main difference is that addu doesn't generate an overflow exceptions.



Let's say we have this binary (I'm using four bits although MIPS is 32 for simplification):



0111


If we add 1 it becomes 1000.



With the add instruction there is an overflow and no carry, since a positive 7 became a negative 1 (assuming two's complement in MIPS). This generates an overflow exception too.



With the addu there is no overflow and no carry, since everything went as expected.



Now let's say you have this binary:



1111


If we add 1 it becomes 0000.



With the add instruction there should be no overflow since a negative 1 became a 0. What about the carry out flag, does it change to 1?



And what happens with the addu instruction? Is it considered overflow, since 15 became 0? I know that there is no overflow exception, but what happens to the overflow flag? Does it get set to 1? What about the carry flag?










share|improve this question













I have searched a bit and didn't find anything that properly explained this.



In MIPS you have add and addu to do additions. The main difference is that addu doesn't generate an overflow exceptions.



Let's say we have this binary (I'm using four bits although MIPS is 32 for simplification):



0111


If we add 1 it becomes 1000.



With the add instruction there is an overflow and no carry, since a positive 7 became a negative 1 (assuming two's complement in MIPS). This generates an overflow exception too.



With the addu there is no overflow and no carry, since everything went as expected.



Now let's say you have this binary:



1111


If we add 1 it becomes 0000.



With the add instruction there should be no overflow since a negative 1 became a 0. What about the carry out flag, does it change to 1?



And what happens with the addu instruction? Is it considered overflow, since 15 became 0? I know that there is no overflow exception, but what happens to the overflow flag? Does it get set to 1? What about the carry flag?







overflow mips carryflag






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asked Nov 11 at 19:12









Myntekt

1161111




1161111








  • 1




    Which carry flag are you referring to? There's no status register in the MIPS architecture.
    – Michael
    Nov 12 at 11:18










  • @Michael oh I thought there was. My bad.
    – Myntekt
    Nov 13 at 12:18














  • 1




    Which carry flag are you referring to? There's no status register in the MIPS architecture.
    – Michael
    Nov 12 at 11:18










  • @Michael oh I thought there was. My bad.
    – Myntekt
    Nov 13 at 12:18








1




1




Which carry flag are you referring to? There's no status register in the MIPS architecture.
– Michael
Nov 12 at 11:18




Which carry flag are you referring to? There's no status register in the MIPS architecture.
– Michael
Nov 12 at 11:18












@Michael oh I thought there was. My bad.
– Myntekt
Nov 13 at 12:18




@Michael oh I thought there was. My bad.
– Myntekt
Nov 13 at 12:18












1 Answer
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There is no carryout flag in MIPS architecture.



Overflow exception in the case of addition happens when the sign of the result is different form the expected sign which can happen:




  • When you add two positive numbers and you get a negative number as a result

  • When you add two negative numbers and you get a positive number as a result


So yes, in you hypothetical 4 bit MIPS 0111+1 results in an overflow, with the corresponding flag being activated.






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    up vote
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    down vote













    There is no carryout flag in MIPS architecture.



    Overflow exception in the case of addition happens when the sign of the result is different form the expected sign which can happen:




    • When you add two positive numbers and you get a negative number as a result

    • When you add two negative numbers and you get a positive number as a result


    So yes, in you hypothetical 4 bit MIPS 0111+1 results in an overflow, with the corresponding flag being activated.






    share|improve this answer



























      up vote
      0
      down vote













      There is no carryout flag in MIPS architecture.



      Overflow exception in the case of addition happens when the sign of the result is different form the expected sign which can happen:




      • When you add two positive numbers and you get a negative number as a result

      • When you add two negative numbers and you get a positive number as a result


      So yes, in you hypothetical 4 bit MIPS 0111+1 results in an overflow, with the corresponding flag being activated.






      share|improve this answer

























        up vote
        0
        down vote










        up vote
        0
        down vote









        There is no carryout flag in MIPS architecture.



        Overflow exception in the case of addition happens when the sign of the result is different form the expected sign which can happen:




        • When you add two positive numbers and you get a negative number as a result

        • When you add two negative numbers and you get a positive number as a result


        So yes, in you hypothetical 4 bit MIPS 0111+1 results in an overflow, with the corresponding flag being activated.






        share|improve this answer














        There is no carryout flag in MIPS architecture.



        Overflow exception in the case of addition happens when the sign of the result is different form the expected sign which can happen:




        • When you add two positive numbers and you get a negative number as a result

        • When you add two negative numbers and you get a positive number as a result


        So yes, in you hypothetical 4 bit MIPS 0111+1 results in an overflow, with the corresponding flag being activated.







        share|improve this answer














        share|improve this answer



        share|improve this answer








        edited Nov 19 at 0:37

























        answered Nov 18 at 17:06









        fasiume

        236




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