Agfdhyk

I mean compared to ICs (ASICs) with similar complexity, speed etc. Let's compare Ethernet switches to Kintex FPGAs (note that the most expensive switch from the list is circa as expensive as the cheapest Kintex):

• FPGAs are well structured ICs (like RAMs). They can be scaled and developed easily.


• The design tools (Vivado, Quartus, etc.) are expensive too, so I think the price of an FPGA is the price of the IC (and development) itself excluding the cost of support and the tools. (Some non-FPGA vendors give free tools whose development cost includes the IC price.)

Are FPGAs produced in lower quantities than other ICs? Or is there any technological harness?

FPGA chips include both logic and programmable connections between logic elements, while ASICs include only the logic.

You'd be amazed at how much chip area is devoted to the "connection fabric" in an FPGA — it's easily 90% or more of the chip. This means that FPGAs use at least 10× the chip area of an equivalent ASIC, and chip area is expensive!

It costs a certain amount to do all of the processing on a given silicon wafer, no matter how many individual chips are on it. Therefore, to a first approximation, the chip cost is directly proportional to its area. However, there are several factors that make it worse than that. First, larger chips mean that there are fewer usable sites on the wafer to begin with — wafers are round, chips are square, and a lot of area is lost around the edges. And defect densities tend to be constant across the wafer, which means that the probability of getting a chip without a defect (i.e., "yield") goes down with chip size.

Another key driver of cost is verification.

FPGAs need to be individually tested before sale. This is partly to ensure that all of the thousands to several million routing interconnects and logic cells are functional. The verification however also involves characterisation and speed grade binning - determining how fast the silicon can operate and that the speed and propagation delays of all the many interconnects and cells are suitably matched to the timing models for its grade.

For ASIC designs, testing is typically simpler - a yes-no does the design perform as expected. As such the time required for verification is likely far less, and thus cheaper to perform.

There is one (more) important point which is usually overlooked, process technology.

FPGAs that have high market share are manufactured with cutting edge technology. To be more specific, Kintex-7 FPGAs have TSMC 28nm process and their shipment started in 2011^[1]. TSMC had started mass production of 28nm in the same year^[2].

[1] Xilinx ships first 28nm Kintex-7 FPGAs (By Clive Maxfield,
03.21.11)

[2] Chang said: "Our 28-nm entered volume production last year
and contributed 2 percent of 4Q11's wafer revenue."

I don't know the process of the ethernet switches, but most of the ASIC design companies don't follow the cutting edge technology. It doesn't make sense for foundries as well.

The following chart shows TSMC's revenue by technology (1Q18). Even in 2018, 39% of the revenue comes from technologies older than 28nm. If we think about the number of chips, it is not hard to imagine that more than half of ASICs are today manufactured with technologies older than 7-year-old Kintex-7.

As a conclusion, process technology is one of the factors that make FPGAs more expensive. I don't claim it is a dominant factor, but significant enough to be considered.

I'm going to go out on a limb and say that this is by far dominated by simple supply and demand. Ethernet switches are mass produced with huge economies of scale and sell at discounts over chips that are not so widely used. FPGAs, I'd say, are not nearly so widely deployed as ethernet switches and so they cost more because the development and infrastructure costs are spread over fewer customers.

This isn't about process or die size or anything like that. Consider the Xilinx Virtex-7 (only because I could more readily find data for it) and let's compare to a few contemporaries :

• Virtex7 (2011), 28nm, ~6.8 billion transistors, $2500USD (popular models) to $35,000USD (higher end models)


• NVIDIA Kepler GK110 (2012), 28nm, ~7.1 billion transistors, Tesla K20 cards ~$3200USD at launch (chip price some smaller fraction of that)


• XBoxOne SOC (2013), 28nm, ~5 billion transistors, $499 USD for whole XBox at launch


• Xeon E5-2699 v3 [18 core] (2014), 22nm, ~5.6 billion transistors, ~$4500USD

So overall the Virtex FPGA seems reasonably priced (more popular models) compared to other silicon of a similar transistor count, generation, and sales volume. The XBox SOC sticks out as something which was widely deployed in a consumer device and the cost is likewise much lower.

NVIDIA's compute GK110 was much less widely deployed than similar consumer chips that ended up in gaming cards and was similarly more expensive, even given the architectural similarities and the fact that the chips were made in the same factory.

As for the Virtex chips, there isn't a 10x difference in the complexity of the $2500 chips vs the $35000 chips - the latter are simply much less popular and, with lower sales volumes, the cost per unit is necessarily higher.

The market is full of this. Anything you can sell a hundred million of you can always make cheaper than something you will maybe sell a hundred thousand of.